资源列表
Cyclone(3)
- 一个fpga设计文档资料原理图，免费支持哦，呵呵，大家一定要下载-win8 system installation key, free support, Oh, Oh, we must want to download and see
Spartan3E-LCD
- 一个基于Spartan3E板子的LCD接受的代码附带testbench-A board of LCD-based Spartan3E accepted code with testbench
ddr3_model
- 一个verilog语言开发编写的简单的ddr3模型-A simple model ddr3, written with verilog language
RS485
- /DM430-L型开发板RS485通信实验，通过开发板与电脑进行数据通信，485接在UART1上-/ DM430-L-type development board RS485 communication experiment, through the development board and computer data communications, 485 connection of the UART1
manfm
- Manchesteer-FM0 coding using verilog
vhdl
- 随着EDA技术发展和应用领域的扩大与深入，EDA技术在电子信息、通讯、自动控制及计算机应用等领域的重要性突出。随着技术市场与人才市场对EDA的需求不断提高，产品的市场需求和技术市场的要求也必然会反映到教学领域和科研领域中来。因此学好EDA技术对我们有很大的益处
B4
- This a vhdl Program-This is a vhdl Program
tiny64_latest.tar
- Descr iption Tiny64 A 64-Bit RISC CPU with minial resource usage. Every opcode is executed in 2 clock cycles. The word size is configurable via XLEN from 32 up to the FPGA limit. The assembler supports also differnet word sizes. Due simpli
dds_quicklogic
- dds 源代码 verilog 很有意义-dds dds verilog source code makes sense
ram256x8
- fpga 基础入门，ram256*8入门编程，Verilog例化编程
FPGA_NAND
- 一个使用VHDL语言并通过FPGA实现的NAND的读写控制和校验算法的程序-Using VHDL and FPGA implementation of the NAND read and write control procedures and checksum algorithms
vhdl
- 实验箱的蜂鸣器是交流蜂鸣器，在BZSP输入一定频率的脉冲时，蜂鸣器蜂鸣，改变输入频率可以改变蜂鸣器的响声。因此可以利用一个PWM来控制BZSP，通过改变PWM的频率来得到不同的声响，以此来播放音乐。-Experiment Box AC buzzer buzzer is in BZSP certain frequency pulse input, the buzzer beeps to change the input frequency can change the sound of the b