资源列表
CODE
- code for floating point multiplication
lab3
- Optimized multiplication by a constant
PWM
- PWM for control of motors
9b93752447d7
- 用verilog 写的 USB 驱动 适用于SOPC IP CORE-USB drive write verilog. For in the SOPC IP CORE
Tristate-buffers
- 本程序完成三态缓冲器的功能，采用硬件编程语言VHDL实现。-This procedure completion tristate buffers using hardware programming language VHDL implementation.
mux16x1_2_4x1_qn70
- VHDL examples for 16x16 times, if need detail pls let me know
vhdl-tut
- Writing VHDL for RTL Synthesis
clock
- 万年历与电子时钟的VHDL程序设计，万年历与电子时钟的VHDL程序设计-clock
cpu
- 用verilog实现的一个32位RISC处理器，能够实现简单的移位、加法等基本操作。-Verilog implementation with a 32-bit RISC processor to achieve a simple shift, addition and other basic operations.
vhdl
- vhdl codes for combinational and sequential circuit
UART_Universal
- 基于FPGA逻辑单元设计的通用异步串行接口设计UART，波特率参数化，模块分解易懂易上手-General UART Design based on FPGA logic
rd1020
- Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the