资源列表
Verilog
- verilog digital clock
DE2_Default
- DE2在板测试代码，用于测试DE2板子的正常性能(DE2 on-board testing code)
vga_vhdl
- 针对FPGA一个实现vga显示的很好的例程，vhdl语言编写。
source3-6
- verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，3-6章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 3-6
aes_pipe
- 流水线AES加密VHDL代码，代码规范，值得参考- The VHDL code of Pipelined AES encryption
vhdl-programs
- this file contain some general vhdl programs .
atan_lut
- 基于改进的查找表的arctan计算模块，包含完整的VHDL源代码及部分注释．绝对原创！-Arctan calculation module based on improved searching form. The rar package contains complete VHDL source code and some notes. Absolutely original!
altera_avalon_i2c_V91
- I2C IP for Quartus V9.0 sp1, can used in SOPC builder.-I2C IP for Quartus V9.0, can used in SOPC builder.
taxi
- 介绍了一种以单片机为核心的多功能出租车计价器，该计价器采用单CPU结构，具有计量功能、掉电保护功能、语音功能等。文中阐述了系统的硬件及软件结构。-This paper present a new type of taximeter based on single chip microcomputer. In addition to metering the distance, this kind of taximeter have safe memory function, speech fun
fpga_DO
- 根据ModelSim提供的命令或者Tcl/Tk语言的语法，将仿真Cmd流程的仿真命令依次编写到扩展名为“do”的宏文件中，然后直接执行这个DO文件，就可以完成整个仿真流程-According to the order provides ModelSim or Tcl/Tk language syntax, the simulation process simulation Cmd command followed by the preparation of the extension "
pci_interface
- PCI接口模块程序 veirlog语言编写 有一定的参考价值-pci interface verilog
altera_avalon_i2c_V90
- I2C IP for Quartus V9.0, can used in SOPC builder.