资源列表
8899
- 最高优先级编码器，是特别好的东西，好不容易才弄到的．-highest priority encoder, is especially good things, the result of the hard-won.
jktrig
- 时序逻辑电路中jk触发器的设计，用vhdl语言编写。-Jk flip-flops in sequential logic circuit design, using vhdl language.
RS232send
- 用Word文档描述了RS-232模块的发送。-With the Word document describes the RS-232 module to send.
LED-flash
- LED灯中断的方式闪烁，可以实现令LED灯一中断方式闪烁-LED light flashes interrupt the way, can make an interrupt flashing LED lights
juzhenganjian
- FPGA用verilog语言写的4X4的矩阵式按键，应经验证过了！-4X4 matrix key FPGA verilog language written, proven over!
GFEInvertor
- 用于生成GF(2^m)有限域元素求逆器的Verilog HDL源文件的C程序
gamethree
- 内嵌BRAM设计LIFO堆栈。功能如下：具有先进后出的堆栈功能。此LIFO堆栈具有两个按键（write， read），按下write键后，开始输入数据data0-data3；按下read键后，7段数码管开始倒序显示data3-data0（十进制）。（内加vga显示数据，不附带图片）-Embedded BRAM design LIFO stack. Function as follows: after having advanced out of the stack functionality.
RS-232sender
- 一个串口RS-232 发送模块。基于VHDL语言。-A serial RS-232 send module. Based on the VHDL language.
hdr2
- file ini berbahaya jangan di bekaasd
switch-control
- 在VHDL语言中拨码开关控制米字管的方法-VHDL language in the code switch control method of tube m word
fpga
- 这是我的fpga分析时序心得，比较详细，欢迎下载-This is my fpga analysis of time series ideas and more details, please download
MIPS_final-version
- 以Verilog所撰寫的Booth’s Algorithm Multiplier，可加到NiosII CPU之上，完成一道NiosII CPU的新指令。-Written by Verilog Booth,' s Algorithm Multiplier can be added to the above NiosII CPU to complete a the Nios II CPU command.