资源列表
yuanma1
- 出租车计费器的设计源代码，很有用的哦。希望大家一起分享下。-Taxi meter design source code, very useful oh. Hope to share with everyone the next.
FIFO
- 基于vhdl语言的fifo设计，方便你了解先进先出理论-Based on the the vhdl language of fifo design, allowing you to understand the first-in, first-out theory
verilog_Divide
- 这是我下的一个用verilog实现的除法代码-This is the one I use to achieve the verilog code division
8253
- With realize based on the FPGA programmable timer counter 8253 designs -With realize based on the FPGA programmable timer counter 8253 designs
DE2_pin_assignments
- DE-2开发板管脚分配，帮助理解DE-2开发版的使用-DE-2 development board pin allocation, to help understand the development version of the DE-2 use
SPIVerilog
- 这个文件的主要功能就是spi串行通行接口的verilog实现，程序描写很全面，还有一些注解。-This file is the main function verilog spi serial communication interface implementation, the program is fully described, and some comments.
code
- razor flipflop used in multiplier for error detecting
数字电子钟
- 数字电子钟 此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能； 5. 跑表功能。-digital electronic clock this digital electronic clock with functions include : 1. Time, hours, minutes and seconds display; 2. 12 hours with 24 hours of conve
udpip
- 赛灵思XILINX FPGA verilog写的UDP/IP协议，可用。-I am prepared to use verilog UDP protocol, the test is available.
verilog-montgomery-RSA
- 基于Montgoery 算法的RSA,FPGA verilog 实现，有测试文件-Based on Montgoery algorithm for RSA,FPGA verilog implementation，bench file
VHDL 的 RSA 的算法源代码
- VHDL 的 RSA 的算法源代码
new rsa algorithm
- this is a very good algorithm to download