资源列表
verilogzzhwfy
- 用Verilog实现QPSK中的差分,扰码,串并,解差分,解扰码,解串并,用MUXPLUS2进行仿真-QPSK with Verilog realize the difference, code, and serial, Xie difference, encryption codes, and solutions Series, The simulation used MUXPLUS2
Float_point
- 浮点数加/减法器的设计 规格化的浮点数运算器 IEEE标准754 单精度-Floating-point add/subtract device design normalized floating-point arithmetic unit single-precision IEEE Standard 754
AdcData
- Device: Virtex-5 -- Author: Marc Defossez -- Entity Name: AdcDataMultiChnl -- Purpose: Four channel version of the data capturing for a Texas Instruments ADC -- Tools: ISE, XST -- Limitations: none -- -- Revision History:-Device: Virtex
Quartus-II-
- quartusII软件的具体简介，讲解的非常仔细，可参考。-quartusII software specific profile, to explain very carefully, can be found.
ch7ex
- 简单数字系统的VHDL代码，综合了组合，时序，和状态机-Simple digital system VHDL code, a combination of combinations, timing, and the state machine
FM24CL16_I2C
- 使用STM32来访问I2C接口的铁电存储器，FM24CL16，2K字节-STM32 to access the I2C interface using ferroelectric memory, FM24CL16, 2K bytes
quartus
- 学习verilog的很好的代码，我自己写的例子，都已经验证过，且有中文说明，全放在TXT中，比较小，方便下载-Good learning verilog code examples I wrote it myself, have been verified, and there is Chinese instructions, all in TXT, a relatively small, easy to download
Digital-tube
- 数码管显示，FPGA实验alter DE2开发板自带光盘的案例教程编程解析-Digital display, FPGA experimental alter the DE2 development board comes with a CD case tutorial programming resolution
LED.VHDL
- LED控制VHDL程序与仿真 分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序-LED control procedures and VHDL simulation briefed on the use of FPGA LED static and dynamic significantly the figures show clock control procedures
VHDLMouseDriver
- 用VHDL编写的鼠标驱动程序。已经可以正常运行了。-Written in VHDL, the mouse driver. Been running correctly.
ERROR_COUNTING_BLOCK
- vhdl code for error counting blk in lms algorithm
timing
- Video RGB timing搭配FPGA系統及三色LED控制,可以實現色序法(Field sequential display).-Video RGB timing with FPGA and three-color LED control system can achieve color sequential (Field sequential display).