资源列表
NIOS_I2C_AT24C128
- 基于NIOS的I2C总线，AT24C128读写代码。-I2C-bus based NIOS, AT24C128 read and write code.
idea
- verilog的学习很重要的教程，有很大的好处。-verilog tutorial learning is important, a great advantage.
Xilinx
- Demux modules and test simulations with various combinations of input and output vectors.I am new to Verilog.I am learning it through a electronic system design course on my college.I am interested in downloading a single .zip file from this site,Ver
signal.rar
- 用VHDL语言写的信号发生器,很不错的应用,VHDL language used to write the signal generator, a very good application
Chapter-2
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
aes
- aes加密算法的Verilog语言实现（顶层代码，已编译，无错误）-aes encryption algorithm of Verilog language (top-level code, compile, no error)
verilog
- Verilog HDL程序设计教程常用verilog模块，特别好的学习资料-" Verilog HDL Programming Guide" verilog modules used, in particular, good learning materials
ps2lab1
- pipelined CPU with hazards and forwarding unit
Verilog
- 在Verilog中有两种类型的赋值语句：连续赋值和过程赋值。赋值表达式由三个部分组成：左值、赋值运算符（=或<=）和右值。右值可以是任何类型的数据，包括net型和register型；但对连续赋值，左值必须是net类型的数据；而过程赋值，左值必须是register类型的数据。下面将作详细描述-There are two types in the Verilog assignment statement: continuous assignment and process assignment
wsmcu51btl_exe
- VHDLram控制器vhdl程序lib_06.zip
spi_verilog
- 使用verilog编写的spi传输模块，已经通过验证，有仿真文件，可以传输信息。-Prepared using verilog spi transmission module, has been validated with simulation files, you can transfer information.
mux21gr
- 毛刺信号被消除的2选1多路复用器，a,b是输入，s是选择信号，y是输出。-Burr signal is eliminated 2 to 1 Multiplexer