资源列表
vhdl
- implementation of VHDL source codes for different projects
载波发生器VDHL语言实现！
- 实现正弦载波的产生。用于PSK，qpsk等各种调制。
std_logic_1164
- VHDL的基本库，是学习VHDL的最原始也是最好的资料，代码很规范-VHDL basic library, learning VHDL most original and best information, the code is standardized
deccount16nr
- 16位任意计数分频器,VHDL语言实现,通过测试-Any count 16-bit divider, VHDL language
abc
- 卷积码编码器的实现，用的是vhdl语言。这是毕设时做的，已经调通。-Convolutional code encoder implementation, using vhdl language. This is done when the complete set has been transferred through.
adder
- adder in vhdl, adder can be add some of inputs and have output in output variabels
acservoceshiyi
- 交流伺服测试仪程序，程序用来测试交流伺服的性能-AC servo tester program to test the performance of AC servo
16位16个精简指令RISC单片机IP
- 16位16个精简指令RISC单片机IP,对于想学习学习处理器内核、编写自己的微处理器的朋友有帮助。-16 bit RISC MCU IP with 16 ops,if you want to study how write your own MCU down,you can get help with it.
FPGAcode
- verilog HDL语言编程实现比较、分频、除法、阻塞与非阻塞语句的源文件和test文件-compare, division,half_clock,block and unblock
FPGACycloneIIEP2C5EP2C8pingluji
- 基FPGA Cyclone II_EP2C5 EP2C8的频率计-epga cycklone
R_m_counter
- 本工程为一个可变模的可逆计数器，通过外部设置可以改变模数，方便使用！-This project is a model of reversible variable counter, setting can be changed by an external module, easy to use!
LPF
- 数字低通FIR滤波器Verilog实现代码-Verilog digital FIR filter implementation code