资源列表
keyscanverilogCX
- 这里有完整的verilog按键消抖程序(经过验证的),有图有真相,本程序是依据特权老师的程序自行改编的,由于按键消抖仿真时间较长,这里是假定16个时钟周期便于仿真。内有详细说明!我在网络上目前只能查找到程序,却找不到仿真程序和解说配套的资料,本文件彻底填补了这一空缺,对于初学者很有帮助!
key
- 应用verilog语言实现4*3按键输入显示在数码管上。-Application verilog language 4* 3 key input on the digital display.
fenpin
- 这是一个二进制的最简单分频器,是一个简短的fpga代码,用verilog书写-This is the most simple of a binary frequency divider, the fpga is a short code, written in verilog
microwave
- VHDL语言实现微波炉的程序,能够实现倒计时,点阵显示剩余时间,火力大小等,到时间的蜂鸣器报警-VHDL language program Microwave
CRC-CCITT_3c120
- EP3C120硬件下的NIOSii运行,经过测试ok,CRC校验源码。-A table-driven implementation of CRC-CCITT checksums.
dma-NIOSii_3c120
- EP3C120芯片上运行的DMA方式程序,经过验证ok。适合NIOSii代码修改或移植。-program for EP3C120 DMA process.
4NandFlash
- fpga读写nandflash,verliog代码。16位读写,经测试。用于fpga带nandflash模块-pga read nandflash, verliog code. 16 read, tested. Modules for fpga with nandflash
CPU
- 4位精简指令集的cpu设计,是数字电路与逻辑的课程设计,对于学习微处理器和数字电路的同学还是很有帮助的-4 RISC cpu design, digital circuit and logic of curriculum design, microprocessors and digital circuits for learning or helpful for students
DDS4.mdl
- DDS(快速正交调制)生成正弦波形,利用相位累加字进行累加,查找查找表内容输出正弦数据,在通信领域应用很多,我采用的是matlab的simulink进行前期仿真-DDS (fast quadrature modulation) to generate sine wave, the use of the word to accumulate phase accumulation, content output sine lookup table lookup data in many applic
digtal-experiment
- 8位计算器的设计,可以实现有效数字为8位的有理数的加减乘除运算,同时运用状态机,可以实现连续计算功能-8 calculator is designed to achieve an effective figure of eight of the rational number arithmetic operations, while the use of state machines, can achieve continuous computing
SP3AN_Rotary_Push_Button
- xilinx Spartan-3A_3AN下编码旋钮借口函数在microblaze下的设计,c语言代码-xilinx Spartan-3A_3AN coded knob under the pretext function microblaze design, c language code
pro_2
- 简单CPU设计。使用Verilog语言,比较简单易懂。-simple CPU
