资源列表
fir_128factor
- 使用verilog 编写的128阶低通滤波器，抽头系数可调。-Prepared using verilog-order low-pass filter 128, the tap coefficients adjustable.
cpld
- 利用quartus软件对CPLD进行文档建立、软件编程、时序仿真-CPLD using the quartus software for document creation, software programming, timing simulation
interpolation_shaping_filter
- 内插成型滤波器的FPGA实现，可根据需要配置不同的内插倍数，Quarter II环境编译，可直接使用-Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly
LCD12864
- LCD12864的测试程序，适合新手学习-TEST CODE OF LCD12864
ram
- 练习调用双口ram,fpga自产生65536个递增数，6.25Hz输出，在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.
booth
- 8 bit signed boot multiplier
easy-CPLD
- 学习CPLD/FPGA很好的电子书．讲得很好．-Learning CPLD/FPGA good books. Put it very well.
fpga-study
- 学习CPLD/FPGA很好的电子书．讲得很好．-Learning CPLD/FPGA good books. Put it very well.
FPGA_SOPC_starter
- 学习CPLD/FPGA/SOPC很好的电子书．讲得很好．对初学者有很好的帮助．-Learning CPLD/FPGA good books. Put it very well. Have a good help for beginners.
SHIYAN
- VHDL多个小实验，包括加法器，AD变换，状态机、波形发生器等-VHDL several small experiment includes an adder, AD conversion, the state machine, the waveform generator
SDRAM_CONTROL_DE2
- 基于Altera公司的Cyclone II 2C35芯片和SDRAM芯片IS42S16400的sdram控制器（教学用）-Based on Altera Cyclone II 2C35 chips and SDRAM chips IS42S16400. the code realize a the sdram controller (for teaching)
quartus
- 学习verilog的很好的代码，我自己写的例子，都已经验证过，且有中文说明，全放在TXT中，比较小，方便下载-Good learning verilog code examples I wrote it myself, have been verified, and there is Chinese instructions, all in TXT, a relatively small, easy to download