资源列表
iicslave
- iic代码 这个是作为从机是接受数据是没有问题的 我已经验证过是可以用的额 -iic this communication code fpga have a slave ,the code test ok
61IC_S5560
- 采用xilinx的FPGA制作的测频模块，通过并口传给单片机-Produced using the xilinx FPGA frequency measurement module, microcontroller via the parallel port pass
multi_booth
- verilog编写的booth算法的8x16乘法累加器-verilog prepared booth algorithm 8x16 multiplier-accumulator
mult
- verilog编写的8x16常变量乘法器，可用quartus仿真-verilog prepared 8x16 often variable multiplier, available quartus simulation
modelsim
- 这是一个适合初学者学习的好文档 -a pdf
pseudo8
- 8位伪随机序列发生器设计，可以进行时序仿真和功能仿真-The design of 8 bits Pseudo-Random Binary Sequence,you can do Timing simulation and function simulation
MtoNgencount
- Consider a counter that counts from m to n and then wraps around. Derive HDL code for the counter. Use generics, M and N, for m and n of the counter.(Note: there should be one control as UP/DOWN such that when UP/DOWN=1 then counts UP and for 0 it co
serialtoparellel
- Write a HDL Code to use as a serial to parallel converter
sqrtaTB
- Write a HDL Code to find the square-root of the given value.
lcd
- 这是学习FPGA的学习代码，语言是VHDL，主要控制LCD12864的显示。-This is learning FPGA learning code, the language is VHDL, the main control display LCD12864.
LFSRT
- LFSR it generates a random test sequence, this is the .v cod. It works well and there is the attachment doc . enjoy it !!!!!!!!!! -it generates a random test sequence, this is the .v cod. It works well and there is the attachment doc . enjoy it !!!!
bhaswatiml
- matlab code for communication