资源列表
iir
- 基于verilog HDL的IIR数字滤波器的实现-Verilog HDL-based implementation of the IIR digital filter
mdio
- MDIO verilog RTL代码，SOC可以通过MDIO接口来访问外部PHY等慢速外设-MDIO verilog RTL code
user_logic_0
- 基于microblaze EDK 工程，实现六种RFID 协议的ip core。-Based on microblaze EDK project, to achieve the six RFID protocol ip core.
i8255_verilog
- 8255的Verilog hdl源代码，适合FPGA工程师使用-8255' s Verilog hdl source code for FPGA engineers
VGA
- herez the code of VGA.its hardware implementation on FPGA
EDA_FPGA_240i2c-master-slave
- 用硬件语言实现的I2C程序，主从都包括，从而实现主从之间的通信-Using the I2C hardware language program, including master and slave are, in order to achieve the communication between master and slave
Code
- 用于数字积分器的设计，主要涉及VHDL、Verilog等FPGA编程语言。-Design of Digital Integrator
STCFFTnew
- 用C51通过傅李叶运算在液晶屏上显示音乐频谱，采样是4.47K-Fu Lee leaves with C51 through operations on the LCD display musical spectrum, the sampling is 4.47K
FPGA_Turbo
- Turbo码编解码的FPGA实现，verilog语言编写-Implementation ofTurbo code on FPGA , using Verilog language
SPI_Interface
- SPI接口的vhdl代码，可以实现与单片机的spi通信，完整的工程-SPI interface of the VHDL code can be achieved with SCM spi communication, complete works
RAM_TO_EEPROM
- STC12C5A32S单片机，将RAM中的数据存储到EEPROM中做永久保存，开发环境为Keil4 C51-STC12C5A32S microcontroller, the RAM data stored in EEPROM to do permanent preservation, the development environment for Keil4 C51
EDA-experiments-based-on-VHDL
- 上传的文件包括E有关EDA实验的程序，比如FIFO，秒表，数字钟，七段数码管，状态机检测序列-The files uploaded contain some source code of EDA experiments based on VHDL, such as FIFO, digital clock, stop watch, digital tubes and sequential detector.