资源列表
v5gtp_sdi_rx_reset
- xilinx virtex5 sdi复位控制-the xilinx virtex5 sdi reset control
clock
- clock frequency will divide into 2,4,6..etc using this code-clock frequency will divide into 2,4,6..etc using this code...
xljcq
- 关于序列发生器的verilog. 希望能帮大家。-sequence generator on the Verilog. Hope you can help.
DS1631Control
- 一个完整的通过IIC总线控制Dallas公司的温度传感芯片DS1631采集温度数据的Verilog代码
VHDL_butterfly
- vhdl编写的蝶形算法程序,供大家参考~~~可用于fft的实现-vhdl butterfly algorithm written procedures for your reference ~ ~ ~ can be used for the realization of fft
VHDLxiaochengxu
- 一些简单的VHDL小程序。 VHDL 小程序源代码： led七段译码 简单调用 秒表 元件例化-Some simple VHDL applet. Small VHDL source code: led seven segment decoding simple example of calling a stopwatch components
circuit_vhdl
- this file is vhdl code for ram
step_4
- 很好的的VHDL代码 实现数码管显示的功能，让您轻松的学会数码管的基本李子-Basic plums good VHDL code to achieve functional digital display, so you can easily learn digital control
68_alarm_controller
- vhdl源程序，在quartus环境下测试，仿真。已经过测试。-VHDL source, the Quartus environment testing, simulation. Has been tested.
Marquee
- VHDL程序设计 8位led发光二极管花样跑马灯 -VHDL programming 8-bit pattern led LED Marquee
hdlc_1
- 高级链路控制的HDLC发送，写的还行，需要使用93版本的VHDL格式-Advanced Link Control HDLC to send, write that still need to use the 93 version of the VHDL format
uart
- 使用altera公司的NIOS核完成串口通信开发-Use altera NIOS core company completed the development serial communication