资源列表
control_interface
- SDRAM控制器Verilog员代码，控制接口模块，完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
DDS
- 用FPGA实现的DDS信号发生器（ALtera的）-DDS signal
Adders
- Adders in VHDL code! full adder,bvadder,adder
psram_controller
- PSRAM_CONTROLLER THE CONTROLLER IS USED FOR PSRAM AND AHB BUS IT HAVE FINISH SIMULATION OK FPGA VERIFY OK SYNTHSIS DESIGN COMPILER SPEED TO 200 mhz -THE CONTROLLER IS USED FOR PSRAM AND AHB BUS IT HAVE FINISH SIMULATION OK FPGA VERIFY OK SY
vacantfiles
- VGA source code for Digilent Inc board Basys
vacantfiles3
- nexys 2 vga working files
spi
- SPI总线，VHDL语言，硬件描述语言源码
I2C_1.1
- Simple I2C controller -- 1) No multimaster -- 2) No slave mode -- 3) No fifo s -- -- notes: -- Every command is acknowledged. Do not set a new command before previous is acknowledged. -- Dout is available 1 clock cycle later as cmd_a
1
- 基于VHDL语言的汉明码的译码，含有校正子跟纠错检错功能
VHDLxiaodou
- 键盘消抖电路的程序，可以实现按键消抖功能-xiaodou
hdlc
- 依据HDLC协议完成数据的收发功能，实现了数据链路层的同步串行数据通信接口的功能。-Descr iption of HDLC protocol.
check
- 这是一个检测器，功能是可以检测输入信号里面“1111”序列的vhdl程序。-This is a detector, the function is the sequence of " 1111" of the input signal which can be detected vhdl procedures.