资源列表
ram
- 实现了对于SRAM的读写控制输入和输出，能够连续的进行读写操作以及能够对各种四则运算的嵌入-Achieved for the SRAM read and write control input and output, can continuous operation and can read and write all four of embedded computing
new-hrx
- wireless monitoring for patient body monitoring using rf
ApbTimer
- PowerFull Apb Timer Controller
verilog 源代码
- DE2 开发板 PS2 1602 LCD 串行 传输 显示
uart_ttl_rk8003a
- 富士通编码模块（自己画底板，配合HDMI芯片sil9135）使用接口,-Fujitsu encoding module interface (HDMI chip after the class module)
UART
- 用Verilog实现uart串口通信，并在Quartus和modelsim上完成测试和仿真，内含源代码和测试程序。-Using Verilog realize uart serial communication, and complete testing and simulation in Quartus and modelsim, including source code and test procedures.
serial
- 基于FPGA 串口与电脑通信，实现FPGA与PC机的通信-Serial communication with the computer based on FPGA
rs232_receiver
- receiver RS-232 programmed in VHDL
divider
- 基于srt-2算法，利用verilog实现16位定点无符号数除法器（除数、被除数均由16位整数和16位小数组成，商由32位整数和16位小数构成，余数由32位小数组成）
DFNL
- On-chip synchronization is achieved by connecting the CLKFB input to a point on the global clock network driven by a BUFG, a global clock buffer. The BUFG connected to the CLKFB input of the DCM must be sourced from either the CLK0 or CLK2X out
verilog
- 里面总共有三个程序，功能是实现2\3双模分频的功能，同时比较了阻塞与非阻塞语句的区别；-It has a total of three programs, the function is to realize 2, 3 dual mode points the function of the frequency, and compared with the obstruction of obstruction statement difference
I2C
- I2C总线接口的Verilog源码文件和modelsimd的测试文件-Verilog source code of I2C bus interface and testbench code of modelsim.