资源列表
ISE-user-guide
- ISE使用指导,对Xilinx ISE初学者在一定的帮助.-It s a guider of Xilinx ISE,and it s very helpful for someone who just begin to learn Xilinx ISE.
MIPs_caculation
- Verilog 实现的32位 定点数运算器-Verilog Number of 32-bit fixed-point arithmetic unit
PWM_LCD
- 使用VHDL实现对LCD亮度的调节，原理是PWM脉宽调制，已验证-Use VHDL adjust LCD brightness, and the principles of the PWM pulse width modulation, Verified
X2_decode
- 利用D触发器实现的2倍频正交解码，稳定性高，相对4倍频较简单-The use of D flip-flop to achieve two octave quadrature decoder, high stability, relatively simple four octave
stack
- 根据堆栈逻辑结构，使用Verilog编写的一个堆栈，并通过仿真实现了功能-fist in last out
2C20
- 红色飓风的编程资料 培训的资料开发板上的-usb
CRC_Tst
- 关于CRC的发射，以及接受的验证，用Verilog实现，包含testbench验证-About CRC launch, as well as acceptable verification, using Verilog implementation, including verification testbench
lift
- 电梯控制- U7535 u68AF u63A7 u5236 .......................................... ......................
QuartusIIVHDLDDS
- 基于FPGA的DDS信号源设计全部内容，可以输出显示频率-FPGA-based design of the DDS signal source of all content, you can display the output frequency
2015_2_zynq_labdocs_pdf
- These are bocks for Zynq FPGA
setmin_sec
- 用QuartusII13.0软件，DE1开发板实现的时钟程序，可设定的时间-With QuartusII13.0 software, DE1 development board to achieve the clock procedures can be set up time
SDRAM
- sdram 状态机驱动源程序工程 完全使用verilog hdl写的-sdram state machine driver source project written entirely in verilog hdl