资源列表
LMX2531_PLL_module
- LMX2531_PLL_module的vhdl编程
trlin_celan
- useful project in verilog hdl, named pong
Ch7
- 《Verilog HDL数字系统设计及仿真》第七章可综合模型设计源代码-" Verilog HDL design and simulation of digital systems," Chapter VII of the source code can be integrated model design
rc5_enc
- rc5的encryption,带state machine，一共四种状态st_idle,st_ready,st_round_op,st_pre_round-RC5 of encryption, with state machine, a total of four state st_idle, st_ready, st_round_op, st_pre_round
GAL16V8(fangzhen74LS138)
- GAL16V8(仿真74LS138),试验通过。包括able及jed文件。对pcb印板设计时，对简化走线特别有用。简单的修改GAL16V8程序，可灵活地进行地址译码修改。-GAL16V8 (simulation 74LS138), test passed. Including the able and jed file. Printed on the pcb board design, especially useful to simplify alignment. Simple modific
hd_source
- 基于Verilog HDL的视频测试pattern发生器。内置各种常见模式。-Verilog HDL-based video test pattern generator. Built-in a variety of common models.
clock
- implementation of digital clock1
STM32_SPI_FLASH
- 使用STM32F103系列CPU，通过SPI控制FLASH,进行读写擦除等操作-Use STM32F103 series CPU, controlled via SPI FLASH, read and write erase and other operations
dianzhen
- 点阵动画扫描，可以实现在不同状态下的切换。-Animation matrix scans can switch between the different states.
processor
- processor design in vhdl
URAT-VHDL
- URAT VHDL程序与仿真,各位可以利用一下，或者参考一下-URAT VHDL and simulation program, you can look at, or reference
filter
- 37阶数字滤波器，使用verilog编写，清晰易懂-37-order digital filter using verilog written