资源列表
celiang
- 使用FPGA完成超声波测距的功能，并在数码管上显示距离值。-Completed using ultrasonic ranging FPGA features and digital tube display distance value.
cpld6713
- TI DSP TMS320C6713 开发板上CPLD的破解，用于开发板裁剪-CPLD crack code of TI TMS320C6713 develop board. Used for board redesigning
New-Text-Document
- I give one code for ADC _ DAC on spartan 3E Hope it can useful for you!
UART_rec
- verilog 串口接收程序，在ACTEL Fusion FPGA上实验成功 和大家一起分享！^_^
mutl16 实现16位移位乘法和除法
- 实现16位移位，可以实现乘法和除法。满足设计要求，实现代码简短，用verilog完成方便，容易操作。-Achieve 16-bit shift, multiplication and division can be achieved. Meet the design requirements to achieve a short code, complete with verilog convenient, easy to operate.
gray_unitary
- 图像数据压缩，用于对视频流的数据动态跟踪范围-video data compress
SHFRTLED
- 可实现七段数码管显示英文 hello 并且实现左移右移- These seven digital can realize these seven digital pipe display hello and realize English moves left the realization of the right shift hello moves left move to the right
wb_switch
- wb_switch，opencore，精简指令cpu设计-wb_switch，opencore，risc cpu design。
dds
- dds产生文件源程序，很好用,调用IP核，在ISE中可以使用-dds files generated source code, useful, called IP cores, can be used in the ISE
fir4tap1
- fir 4 tap code in VHDL
3phase_duty_pwm
- to generate the pwm with various duty cycle and phases
vga_vl
- 基于altera开发板的七段数码管显示程序，用于初学者-Altera development board based on the seven-segment LED display program for beginners