资源列表
delay_line
- 延迟线模块的verilog代码，延迟线模块是数字电路设计常用的模块-Delay-line module Verilog code, delay-line module is commonly used in digital circuit design module
wb_flash_latest[1].tar
- flash 控制器，用verilog描述，希望对大家有帮助-flash controller!
lcd
- 使用FPGA控制LCD1602，采用VHDL语言描述-Using the FPGA control LCD1602, use of VHDL language to describe the
sellor
- 数字系统设计，用VHDL语言编程完成自动售票功能-Digital system design, VHDL programming language features to complete the ticket
sdr_sdram
- sdram控制器，verilog语言写的-sdram controller, verilog language to write
ReadFsm
- VHDL小程序，read FSM。可以作为VHDL一次作业使用。包含测试文档testbench。-VHDL applet, read FSM. A job can be used as a VHDL。VHDL code and testbench.
FIFO_TD
- FIFO的VHDL测试程序,在Modelsim下完全可以运行-The test_bench of fifo
lock
- 基于VHDL语言实现的可下载到FPGA板子上的数字密码锁代码，包含按键防抖动功能的实现。-Based on the VHDL language can be downloaded to the FPGA board digital password lock code, containing the button shake function to achieve.
fnd-clk
- FND, SEGment verilog code
chaoshengbo
- 超声波测距单元，在测距完成后在8位数码管上显示测距结果，可用于小车防撞。-Ultrasonic Ranging unit can be used for car crash
ltc2145_spi_ctrl
- Linear Technology ADC ltc2145 SPI Controller
image_scaling
- Image scaling using verilog