资源列表
statemachine
- 基于状态图的光电编码器4倍频vhdl程序，输入相位差90度的两相，输出倍频和方向信号-Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, enter a 90-degree phase difference of two-phase, frequency and direction of the output signal
1-Animatie-CoCa-Cola
- Seven Segment Animation
con1
- 4 bit convoltion with vhdl.
rxmodem
- vhdl file-vhdl filebbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb
div_2
- 2分频代码，用于4路视频AD采样。原时钟为25M-2 frequency code for the 4-way video AD sample. The original clock is 25M
uart_send
- 串口发送程序，用无数设备验证过的，可靠，波特率2M，系统时钟40M-Serial transmission program, verified by numerous equipment, reliable baud 2M, the system clock 40M
spi25
- 铁电SPI 读写 FPG 外挂SPI铁电存储器的读写控制代码.-FM25** SPI R/W
AD9957_Signal_Generate
- AD9957芯片通过FPGA配置的verilog程序,要自建工程，代码测试完全可用-AD9957 chip FPGA configuration verilog program, to be self-built project, code test is completely available
rxtx
- 串行通信程序，程序稳定可靠，分为好多模块代码写的不错，值得参考，-Serial communication program, the program is reliable, divided into a lot of module code written well worth considering.
phase_add
- 分频器，实现任意频率的分频，只需修改频率控制字,已经经过多次验证-Divider to achieve any frequency divider, simply modify the frequency control word, has been repeatedly verified
C702
- 控制HMC702的VHDL程序代码,实际使用是可以的，HMC MODE-HMC702 SPI VHDL code
Dijkstra
- 用verilog 实现求最短路的Dijkstra算法，用modelsim仿真通过，数据真确，-Dijkstra implemention with verilog base on FPGA