资源列表
eetop[1].cn_round
- 简单的VGA veliog fpga 测试小程序，显示彩条-a simple vga verilog fgpa test
stable_key
- 按键消抖电路,包含VHDL编写的程序，以及VerilogHDL编写的程序-Key debounce circuit, including a program written in VHDL, as well as programs written VerilogHDL
fftfpga
- 2008-2009年优秀硕士论文：基于FPGA实现可扩展高速FFT处理器的研究.pdf-2008-2009 Outstanding Master Thesis: FPGA-based high-speed FFT processor scalable research. Pdf
fftip
- 2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
Decoder
- A simple decoder circuit implemented in VHDL and tested on Spartan 3A Starter Kit board by Xilinx.
adder_w_carry
- VHDL Example code for implementing an adder with carry digitall circuit. The UCF file is set for Spartan 3A Stater Kit board.
2b_Comparator
- VHDL code for comparing two two bit numbers. Implemented on Spartan 3A Stater Kit board.
FFT_report
- 印度一所大学的硕士研究生毕业设计：FFT处理器的的fpga实现-India, a masters graduate of the University of Design: FFT processor for fpga implementation
pseudo-randomcodegenerator
- VERILOG语言编写的伪随机码产生器，可以ISE中编绎调试-VERILOG language of pseudo-random code generator, you can unravel ISE in debugging code
OpenRISC
- OpenRISC_or1200 source code
modelesim_entry_written
- modelesim 入门讲解 从新建 编写 综合仿真 观察波形 图层 很具体的讲解-modelesim entry written comprehensive simulation to explain the new observations from the waveform to explain a very specific layer
illinoi_arm7
- 一种ARM IP core，国外一个论坛上载下来的，希望能有所用处-A ARM IP core, a forum set off abroad, and hope to be useful