资源列表
Asynchronous_slavefifo.v
- data trasfer from fpga to usb device developed in vhdl format
shift_latch
- 该程序实现4位通用移位寄存器的功能，已通过仿真无误。-4-bit general purpose of the program to achieve the function of the shift register, has passed the simulation is correct.
decoder_3_8
- 该程序实现3-8译码器功能，已通过仿真验证无误。-3-8 decoder implementation of the program features have been verified by simulation and correct.
sram_8_8
- 该程序实现8*8位的静态随机存储器功能，已通过仿真验证，程序运行无误。-The program realization of 8* 8-bit static random access memory function, has been verified by simulation, the program runs correctly.
COORDIC
- Paper about the CORDIC.
piso.txt
- PISO implemented in VHDL.
stop_watch_1kHz
- stop_watch vhdl code
VGAinterfacedesigexamplesandtestprocedures
- VGA接口设计实例及测试程序 实验通过-VGA interface design examples and test procedures
VGAIPcoreVerilog
- VGA IPcoreVerilog 和不错的代码值得 -VGA IPcoreVerilog
2dFIR
- 2 D FIR filter With VHDL-2-D FIR filter with VHDL
sdramcntl
- SDRAM Burst程序在XC3S系列FPGA有成功-SDRAM Burst Source code for XC3S series FPGA
crc_verilog_xilinx
- 各类CRC效验码 有CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8-CONTAIN CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8