资源列表
filter
- image filtering on gasian filtering in any RGB image with matlab
Crack_for_QII_12.0
- quartus ii 12.0破解文件，包括32位和64位-quartus ii 12.0 crack file, including 32-bit and 64-bit
fft_analyze
- 利用Altera的IP核，实现FFT算法使用信息流模式读写，使用SignalTap II嵌入式逻辑分析仪观察信号，A/D只要是并行的8位芯片都可以。-Achiving FFT by using Altera IP Core,you can observe the signal by the embedded logic analyzer Signal Tap II,as for A/D device, it s suitable for a parllarel 8 bits A/D device
DA
- 结合硬件描述语言与电路设计的DA转换器设计，实现了递增波，递减波，阶梯波，三角波等-Combined with hardware descr iption language and circuit design of the DA converter design, to achieve the incremental wave, decreasing wave, ladder wave, triangular wave, etc.
fenpin5
- 五分频器的VHDL语言设计，改变相关参数，可得到其他分频器，便于学习VHDL语言-Five frequency divider VHDL language design, change the relevant parameters, you can get other dividers, easy to learn VHDL language
CNT12
- 通过一个简单完整而典型的12进制计数器的VHDL设计实例，来使大家初步了解用VHDL表达以及由此而引出的VHDL语言现象和语句规则。 让大家能够迅速的从整体上把握VHDL程序的基本结构和设计特点，达到快速入门的目的。 -Through a simple and complete and typical 12-band counter VHDL design examples, to make preliminary understanding of VHDL expression and the
25mto8k
- fpga编码，vhdl，将25m信号分频为8k信号，已仿真验证-fpga 25m to 8k
DE2_115_ControlPanel_V2.2.0
- This file may be support learn VHDL code
xapp897
- Video streaming example VHDL
sgmii
- 这是有关V5中有关SGMII的开发例程，对于学习SGMII的同学会有帮助-This is the development of relevant V5 relevant SGMII routines, are helpful for learning SGMII homecoming
EMIF
- 这是DSP的EMIF总线和FPGA通信的实例，已经测试能用-This is DSP EMIF bus and FPGA communication as an example, has been testing can be used
ADS2807_Ctrl
- ADS2807控制,模块功能：取回控制字，控制AD采样速率和AD的地址发生器-ADS2807 control, module function: retrieve control word, control AD sampling rate and AD address