资源列表
lcdok
- 自己写的LCD控制器，在EP1C3T140C8上跑过，对初学者有帮助，实在的VHDL代码-Write your own LCD controller, in the EP1C3T140C8 last ran for help for beginners, it' s VHDL code
SDRAMController
- xilinx公司SDRAM的参考设计,调试成功-xilinx' s SDRAM reference design, debug successful
vc
- virtul channel 虚拟通道 用于改善noc的死锁效应-virtul channel virtual channel used to improve the effect of noc Deadlock
counter
- This a simple Counter -This is a simple Counter
Altera_Verilog_Coding_Style_Proposal_final
- Altera的Verilog 代码规范，讲解的还可以-Altera' s Verilog code specifications, explanations can also be
WAVE6000
- 基于VHDL语言设计一个全双工UART电路，主要模块：波特率模块、数据发送模块、数据接收模块。-VHDL language design based on a full-duplex UART circuit, the main modules: module baud rate, data transmission module, the data receiver module.
FPGA
- Learnado Spectrum for simulation software
Verilog
- 一本简单的详细的介绍verilog语法的知识手册-this is a samll book which have introduce the verilog very detail
VerilogHDlclock
- 基于VerilogHDL设计的多功能数字钟-Based on the design of the multi-function digital clock VerilogHDL...
clock
- 该代码用verilog语言编写，实现24小时时钟计时，时、分、秒，输入为1HZ时钟-The code using verilog language to achieve a 24-hour clock time, hours, minutes, seconds, the clock input 1HZ
DDS_XHQ
- 通过FPGA实现DDS，产生一个任意波形，本程序实现了一个频率可调的正弦波-Through the FPGA to achieve DDS, generate an arbitrary waveform, this program implements a sine wave frequency adjustable
clock
- 用Verilog HDL编写的电子钟,实现一些简单功能,包括计时,调时-Written in Verilog HDL using electronic clock to achieve some simple functions, including timing, tone, when