资源列表
1DCT_VHDL
- VHDL Behavioral Model for 1D DCT operation Algorithm : Calculates the 1D DCT coefficients. DCT Points range from 8 to 32. There is double buffering at the input, to allow continuous usage of DCT engine.-VHDL Behavioral Model for 1D DCT operation
VHDL_8X8ledaaa
- 一个led8*8的vhdl程序 多余平时有兴趣玩玩led的朋友有小小的帮助-1 led8* 8 of the vhdl procedure superfluous in peacetime are interested in play led to a little help from friends
baseonVHDL
- 基于VHDL语言的8051IP核的设计与验证研究 是一篇我从通过学校校内IP下载的论文，觉得挺好-VHDL-8051IP-based design and verification of nuclear research is an IP I downloaded from the school through the school paper, I feel quite good
digitalwatch
- Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The e
matriled
- led显示器应用相当广泛，数码管的应用也很广泛，本设计就led驱动，数码管驱动进行了设计，设计中采用VHDL语言，在FPGA上实现了功能方真，在开发板上实现功能。-led driver， led scan
pspro
- 计算机所用的键盘就是ps接口键盘，本设计是基于FPGA的ps2键盘接口设计，所用的编程语言是VHDL语言，已经通过了仿真，可以很好的实现功能-ps2keyboard interface with VHDL codes and it has useful
DDS
- VHDL经典设计 十进制 VHDL 频率计-VHDL classic design metric VHDL frequency counter
Altare
- altera 公司训练新人的经典练习题，对初学者很有帮助。-altera' s classical training, new exercises, helpful for the beginner.
matrikeyscan
- 矩阵键盘在工程中应用很广，而且在一些开发板上也会用到矩阵键盘，用FPGA来实现键盘的借口方便简单，本代码就是扫描接口设计源代码-matiry key scan code
electronictime
- 1、能够显示时、分、秒，能够进行设置 2. 具有整点闹铃功能 3. 能够在12小时/24小时显示模式中切换。-1, can display hours, minutes, seconds, can be set 2. With the whole point of the alarm function 3. Can be 12 hours/24 hours display mode switch.
cordic_latest.tar
- Cordic Core Specification
c_xapp851
- 这是xilinx应用指南xapp851的中文版本。本应用指南描述了在 Virtex™ -5 器件中实现的 200 MHz DDR SDRAM （JEDEC DDR400 (PC3200) 标准）控制器。本设计实现使用 IDELAY 单元调整读数据时序。读数据时序校准和调整在此控制器中完成。-This is the xilinx application note xapp851 the Chinese version. This application note describes