资源列表
s_UIC_v3.03.tar
- (IBM) Interrupter Controller for PowePC405 (verilog)
Quartus_ii_instruction
- 本文为Quartus 简明教程。以设计一个简单的LED7段译码器为例介绍使用Quartus设计的全过程。-This article Quartus simple tutorial. To design a simple example to explain LED7 segment decoder using the Quartus design process.
FPGA_note
- 这主要是在学习FPGA设计过程中的笔记.主要是：FPGA设计中的电源管理，关键问题，PLDFPGA结构与原理初步的认识，以及如何养成良好的编程习惯、大型设计中FPGA的多时钟设计策略及其概念：毛刺、竞争、冒险。-This is mainly to learn FPGA design process in the notes. Is mainly: FPGA design, power management, the key question, PLDFPGA preliminary unders
mem_stick
- Sony - memory stick pro controller (verilog)-Sony- memory stick pro controller (verilog)
an-102104-keybrd
- PS2 FPGA INTERFACE, for newbie programers
PCI_testbench
- 基于FPGA的PCI接口源代码及Testbench Verilog程序代码-PCI_verilog_with testbench.
FPGA_lizi
- FPGA实例,ADC0809,DAC0832接口电路程序,LCD控制VHDL程序与仿真,等实例,验证通过.-FPGA.VHDL
fpga
- FPGA characteristics presentation
Verilogobouttelephone
- verilog的一个电话设计的源代码，初学者和设计着可以参考-a phone designed for verilog source code, can refer to the beginners and design
jiajianfaqi
- 利用VHDL语言设计的两位加减法器，设计采用BLOCK并行设计可以同时进行加法与减法运算-VHDL language design using addition and subtraction of two instruments used, designed using BLOCK parallel design can be done concurrently addition and subtraction
JKdff
- 基于VHDL语言设计的边沿JK触发器，及相应的仿真波形-VHDL language design based on the edge of JK flip-flop, and the corresponding simulation waveforms
iCACHE
- 用VHDL写的数据cache，基于Verilog版本改编过来-To use VHDL to write the data cache, based on the Verilog version of the adaptation over