资源列表
cr_counter
- 视频图像的行列计数器基于VHDL的实现，已经调试仿真通过-Video images VHDL-based implementation of the ranks of the counter has been adopted debugging emulator
Vhdl
- documentations about vhdl
MIT_Press_Circuit_Design_with_VHDL(2007)
- MIT Press出版的，书名是Circuit Design with VHDL(2007)，相信很有用的-MIT Press- Circuit Design with VHDL(2007)。It is of great importance for you!
proc
- vhdl processor,5 commands,memory,testbench
seg7led
- FPGA的seg7ledFPGA控制led显示-FPGA-seg7ledFPGA control led display
division1
- 基于vhdl/verilog的18位除法器程序。已经过仿真和综合。-Based on vhdl/verilog program for 18-bit divider. Has been simulation and synthesis.
fft2
- 512点8位基2fft程序。基于 vhdl/verilog。已仿真布线通过。-512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
multi
- multicycle bvbj vhdl-multicycle bvbj vhdl
ad80141_intf
- FPGA，Verilog实现AD80141-Verilog，实现AD80141
CComplex_CFourior
- 离散傅立叶变换的实现,基本功能：构造一个CFourior类的对象。-Discrete Fourier transform realization of the basic functions: to construct a CFourior class object.
DDS_spectrum_analysis
- 基于FPGA实现DDS的设计 基于DDS的频谱分析仪的设计 Word 文档-FPGA based DDS DDS design with Word format
AD
- 用硬件语言VHDL编写AD采集系统，经过仿真结果正确-Hardware language VHDL with the preparation of AD acquisition system, after a simulation result is correct