资源列表
keyboardcontroller
- 键盘控制器VHDL代码 该控制器实时扫描矩阵键盘的行列，当用户有按键按下时，可以定位到对应的按键并产生一个中断信号-Keyboard controller entity -- -- The controller scans the columns, cols, by making a different column logic-0 -- therefor the inputs have to be pull-up high. It processes the input,
watchdog
- 看门狗定时器Verilog源码；用于MCU的辅助模块，定时特定的时间来做硬件复位，是用于避免固件跑死的一个机制。-Watchdog verilog source.
vhdl
- vhdl file u can use it
UART1X
- code spimaster a de transmissor receptor
spimaster_latest.tar
- 经过验证的LCD控制器的代码，含testbench和说明文档-Proven LCD controller code, including testbench and documentation
EmbDKnowledgeSeriesWebinar
- Tektronix FPGA Debugging - A discussion of the challenges in debugging FPGA designs and how those challenges can be addressed in the overall FPGA design flow.-Tektronix FPGA Debugging- A discussion of the challenges in debugging FPGA designs an
key
- 基于FPGA的数字密码锁，采用FPGA 2C5作为主控制器-FPGA-based digital lock, using FPGA 2C5 as the primary controller
4X4key_scan
- 基于FPGA的4x4键盘扫描程序，采用VHDL语言进行编写-FPGA-based 4x4 keyp scanner, using VHDL language to prepare
pingpang
- 本实验在实验室实现了对于简易的乒乓球游戏的模拟，以发光二极管的移动来模拟乒乓球的移动，转向表示击球，并实现积分。-In this study, achieved in the lab for a simple table tennis game simulation, in order to light-emitting diodes to simulate the movement of table tennis movement, turning that ball and achieve
complete
- 基于Verilog写的测信号频率和幅度得程序，可用-Written in Verilog-based test signal frequency and amplitude were procedures, can be used
butterfly2
- This VHDL code for butterfly filter banks-This is VHDL code for butterfly filter banks
clk_div
- Thia is VHDL code for clock divider