资源列表
61EDA_D1116
- A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulat
guess_num
- a guess number game based on CPLD,include such functions as keyboard input ,LCD display,voise output,and so on -a guess number game based on CPLD, include such functions as keyboard input, LCD display, voise output, and so on
std_31002lib
- library vhdl xst hdp src std 31002 dio components xhdp hdlib hdpdeps sub00 library vhdl xst hdp src std 31002 dio components xhdp hdlib hdpdeps sub-library vhdl xst hdp src std 31002 dio components xhdp hdlib hdpdeps sub00 library vhdl xst hdp sr
dvf
- 利用VHDL语言实现数控分频，通过输入频率控制字来调整分频，输出不同的频率-NC VHDL language use frequency, through the input frequency control word to adjust the frequency, the output of different frequency
fequency
- 基于CPLD的等精度数度频率计，可以通过外设功能按键实现，频率、相位、占空比等参数的测量。-CPLD based on the number of degrees of accuracy, such as frequency meter, key peripheral functions can be achieved, frequency, phase, duty cycle measurement of parameters such as
vhdl_dds
- 利用VHDL语言实现的简易DDS，便于调节正弦波的频率及相位-VHDL language using a simple DDS, easy to adjust the frequency and phase sine wave
shuzipinlvjiVHDL
- 功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的 --高4位进行动态显示。小数点表示是千位，即KHz-Features: frequency meter. With four shows that will automatically count 7 the results of the metric system to automatically select a valid data - 4 high-dynamic show.
VHDLjianpan
- 一个VHDL键盘的设计，有去抖，能稳定在LED上显示。程序都已变好，你可以借鉴一下。-VHDL design of a keyboard, and to tremble, to stability in the LED display. Procedures have been changed for the better, you can learn from you.
PS2-SPI
- 使用SOPC软件及其配置方法，以高速12位串行AD7920实现0-3.3V的ADC转换。 PS2控制器接口模块,把键盘数据通过串口发送到电脑主机上显示哪个键被按下。-Configuration software and its use SOPC approach to high-speed 12-bit serial AD7920 to achieve 0-3.3V the ADC conversion. PS2 controller interface module, the keyboa
FFTVHDl
- 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core
vga_rgb
- 基于FPGA的实验。编写程序实现VGA彩条显示。像素800x600，刷新频率75Hz，实现8位色的彩条显示-FPGA-based experiment. Programming to achieve color VGA display. Pixel 800x600, refresh rate 75Hz, to achieve 8-bit color display color
pinlvji
- 考虑到只基于单片机的频率测量计设计主要是以单片机为基础，原理简单，但由于自身精度问题，测量的范围小。而基于FPGA和单片机结合的频率测量设计主要是以单片机作为系统的主控部件，FPGA完成对时序逻辑控制、计数功能，能较好的利用了FPGA的高精度、高速等方面的优势。-Taking into account only single-chip based on the frequency meter is based on single-chip design based on a simple pri