资源列表
67506232
- 8位加法器的原代码,主要内容下载看了就知道-8-bit adder of the original code, the main contents of Download read on to know
33753129vhdl
- 对数计算源程序，能够在FPGA中计算某数的对数-Determined on the basis of the source, calculated in the FPGA to a certain number of log
87361039
- 于一个8位处理器的分析，和源代码，VHDL语言设计，经过测试-An 8-bit processor in the analysis, and source code, VHDL language design and tested
196947shizilu
- 使用VHDL实现十字路*通灯控制器设计，适用于初学者-The realization of the use of VHDL crossroads traffic lights controller design for beginners
stbc
- STBC的硬件实现源代码，用Verilog语言写的-STBC hardware to achieve source code, written using Verilog language
miaobiao
- VHDL语言实现秒表并在共阴数码管上动态显示十进制数值-VHDL language stopwatch and digital control on a total of negative dynamic display decimal values
sobel_filter
- 实现sobel滤波，在simulink中用第四篇builder实现-complete a sobel filter
FPGACPLD
- FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可
ask
- 用VHDL语言实现ask调试,用VHDL语言实现ask调试-This program can do ask using VHDL
VHDL_CXSL
- 许多VHDL设计实例 还挺好的 讲解挺详细- VHDL design of many examples of quite good on the very detailed
61EDA_C731
- vhdl的100个例子，可以看着来学习VHDL，感觉还可以。-vhdl example of the 100, you can watch to learn VHDL, can also be felt.
200704252
- fpga design, give you a brief idea or concept of how the network functions-ethernet basic concept, from osi 7 layer to tcp ip, easy to learn network technology in a single step!