资源列表
FPGAREAL
- 信号处理FPGA实现参考,IEEE transaction 的一篇文章。主要针对信号处理中加窗、FFT、VSLI快速实现中误差地等问题。-FPGA realization of a reference signal processing, IEEE transaction of an article. Mainly for signal processing windowing, FFT, VSLI rapid error problems.
ECCgenAndLoc
- 基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序，EccErrLoc文件夹为ECC错误定位程序。-Xilinx ISE environment based on the development of VHDL the NAND flash ECC to achieve, eccGen256Byte folder produced for the ECC procedures, EccErrLoc folder l
fen1to7
- 这是我在ISP编程实验中独立编写的一个采用行为描述方式实现的分频器，通过两个并行进程对输入信号CLK进行8分频，占空比为1:7-This is my ISP programming experiment in the preparation of an independent descr iption of the use of behavior to achieve the prescaler, through two parallel processes on the input signa
four_fadd
- 这是我在ISP编程实验中独立编写的采用结构化描述的四位全加器，通过四次映射一位全加器的方式实现了四位全加器的功能，并附有数码显示模块，将全加器的运算结果输出到数码管显示。-This is my ISP programming experiment in the preparation of an independent structural descr iption of the four full-adder, through the four mapping of a full adder
seven
- 这是我在ISP编程实验中独立编写的采用结构化描述的一个七人表决器，通过独特的3次映射一位全加器的方法从而实现七人表决器的功能，与网络上任何其他的七人表决器源码决无雷同。-This is my ISP programming in an independent experiment using a structured, prepared as described in a seven-member voting machine, through a unique 3 times a full a
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
s7_sp
- xilinx3s400开发板厂家光盘源码。蜂鸣器实验-CD-ROM manufacturers xilinx3s400 source development board. Buzzer experiments
s6_unjounce
- xilinx3s400开发板厂家光盘源码。按键防抖动-xilinx3s400 source development board CD-ROM manufacturers. Button防抖动
s5_counter
- xilinx3s400开发板厂家光盘源码。计数器conuter-CD-ROM manufacturers xilinx3s400 source development board. Counter conuter
milixingzhuangtaiji
- 米立型状态机的输出变化要提前一个周期，即一旦输入信号或状态发生变化，输出信号立刻发生变化。-M-li-type state machine to advance the output changes in a cycle, that is, once the input signal or status change, the output signal of immediate change.
coder
- 这是用VHDL语言编写的3-8编码器，可以看到程序简单可行-This is the language used VHDL encoder 3-8, we can see that the procedure is simple and feasible