资源列表
JIANCHE
- 本设计是一个序列检测器，能够检测11位长的系列信号，根据需要可适当扩展其序列长度-The design is a sequence detector, can detect a long series of 11 signals, according to the needs may be appropriate to expand its sequence length
Veriloghuangjincankaozhinan
- Verilog 黄金参考指南是Verilog 硬件描述语言及其语法语义合并以及将它应用到硬件设计的一个 简明的快速参考指南-Verilog Golden Reference Guide is the Verilog hardware descr iption language and its syntax and semantics combined it applied to hardware design, a concise Quick Reference Guide
pwm-c
- 用VHDL编写的PWM控制程序，通过寄存器控制20余路PWM输出；qar是quartus的压缩包格式-VHDL prepared using PWM control procedures, through the registers to control more than 20 road PWM output qar is Quartus compressed packet format
uart
- 用VHDL实现的一个uart控制器，输入时钟为33M-Use VHDL to achieve a UART controller, input clock for the 33M
xapp199(E)
- vhdl的testbench编写的文档，英文版的，可以看懂-VHDL Testbench for the preparation of documents, in English, you can understand
Full_Adder
- 內含fulladder結構檔,電路檔,測試檔(testbench)以及執行檔(.do)-Fulladder file containing the structure, the circuit file, test file (testbench), as well as executable file (. Do)
autoseller
- （1）、自动售货机可以出售4种货物，每种商品的数量和单价在初始化时设定，并存储在存储器中； （2）、采用模拟开关分别模拟5角和一元的硬币进行购物，并通过按键来选择商品； （3）、系统能够根据用户输入的硬币，判断钱币是否够，当所投硬币达到或超过购买者所选面值时，则根据顾客要求自动售货，并找回剩余的硬币，然后回到初始状态。当所投硬币不够时，则给出提示，并通过一个复位键退回所投硬币，然后回到初始状态。 -(1), vending machines can sell four kinds o
Digital_freq_tester
- VHDL编写的数字显示型频率测试仪，用数码管显示-VHDL figures prepared frequency tester, digital display
HW_songer_yijianmei
- 用VHDL编写的播放器，播放一剪梅主题曲之《一剪梅》，另附编码表WORD档-Using VHDL prepared player,一剪梅play the theme song of
HW_songer_tiexuedanxin
- 用VHDL编写的播放器，播放射雕英雄传主题曲之《铁血丹心》，另附编码表WORD档-Using VHDL prepared player, the player shooting Heroes theme song of
HW_songer_nverqing
- 用VHDL编写的播放器，播放西游记插曲《女儿情》，另附编码表WORD档-Using VHDL prepared player, player of Journey to the West episode
zerojustv
- 我自己写的过零点判断模块，经过调试效果很理想-I wrote it myself to determine zero-crossing module, after testing the effect of very satisfactory