资源列表
programmablpulsegenerator
- 用VHDL编译的源代码，可编程脉冲生成器，解压后直接用Quartus打开project即可-Compiled with VHDL source code, programmable pulse generator, after extracting the direct use of Quartus can open the project
heartbeat
- 用VHDL编译的源代码，模仿心脏跳动，解压后直接用Quartus打开project即可-Compiled with VHDL source code, mimic the heart beating, after extracting the direct use of Quartus can open the project
VHDLxianjie
- VHDL语言详解，简要全面的介绍vhdl要点-Detailed VHDL language, VHDL, introduced a comprehensive summary points
fir_Verilog
- 用Verilog编写的fir滤波器程序！-Verilog prepared using the procedure fir filter!
median
- 用verilog编辑的中值滤波器！语言旁表有注释方便理解！-Using Verilog editor median filter! Language beside the table annotated to facilitate understanding!
16_FIR
- 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
kbclj
- 可编程逻辑系统的VHDL设计技术，早期经典的VHDL教程，以CYPRESS器件为基础，希望对大家有所帮助！-Programmable Logic VHDL system design technology, early classic VHDL Guide to CYPRESS device based on the hope that all of you to help!
v2c5_sopc_leds
- FPGA中NIOS2led显示程序，非常适合初学者-FPGA in NIOS2led display program very suitable for beginners
4weishuzipinlvjikongzhimokuai
- Verilog HDL下的4 位数字频率计控制模块源代码-Verilog HDL under four digital frequency meter control module source code
shuzizhong2008
- 本文描述了数字钟的设计方案和具体的设计步骤及代码，功能比较全面，可以直接用作课程设计！-This paper describes the design of digital clock program and the specific design steps and code, function more comprehensive and can be directly used for curriculum design!
pinlvji
- 本文十一个用VHDL频率计设计的方案描述，该设计阐明了设计的思路，步骤以及设计的最终代码，设计方案十分详细，是您学习的必备辅助！-In this paper, with 11 Cymometer VHDL design program descr iption, the design sets out design ideas, steps and design the ultimate code, the design is very detailed, it is essential tha
jishuqi
- 本文十一个计数器的实验报告，阐述了设计的思路，设计的具体方案，以及上机操作的步骤，描述非常详细！-This article counters 11 Experimental report on the design ideas, design specific programs, as well as steps on the machine, described in great detail!