资源列表
6_DigTub
- FPGA，VHDL 语言 静态点亮一位数码管，适用于所有FPGA芯片，VHDL源程序！-FPGA, VHDL language static lit a digital control applies to all FPGA chip, VHDL source code!
spartan3e_spi
- 本程序可以再spartan3e的板子上实现利用SPI协议实现对flash ID号的读取。-The program can achieve then spartan3e board SPI protocol to read flash ID number.
DPLL
- 90度锁定的数字锁相环的设计的VHDL源代码-The VHDL code of Digital Phase-Locked Loop Based on CPLD
DE2_i2sound_example
- 基于FPGA I2C总线的音频处理系统设计实现-FPGA I2C bus-based audio processing system design and implementation
ecp233_1
- elliptic curve processor b-233, include test bench & test vector.
yima1
- 本程序是在Xilinx ISE上编写的，它是（7,3）码的另外一种译码方法。里面有源程序和用以仿真的测试文件-This program is written in the Xilinx ISE, it is another (7,3) code decoding method. Source and for the simulation of the test file inside
parity_and_CRC
- 奇偶校验和循环冗余检测的Verilog代码，很好，和大家一起学习-Parity and cyclic redundancy detection of Verilog code, very good, and we will study together
part2
- Altera DE2 开发板试验3 第2部分VHDL答案-Altera DE2 Lab3 Part2 VHDL Answer
watch
- 基于verilog-HDL的电子秒表电路，采用quartusII72编译仿真，经下载测试通过。-Verilog-HDL-based electronic stopwatch circuit simulation using quartusII72 compiled by downloading the test.
16128-LED
- 用16*128点阵屏实现时间和温度的显示，此程序非常实用！请尊重版权，不要用于商业目的！-16* 128 dot matrix screen with the realization of time and temperature display, this program very useful! Please respect copyright, do not use for commercial purposes!
costas
- 载波同步，costas环，基于Verilog的载波同步环-Carrier synchronization, costas ring, based on Verilog carrier synchronization ring
Verilog_IIC
- 利用EP2C8Q208的FPGA芯片，利用Verilog硬件描述语言，实现对AT24C02的EEPROM进行读写操作。-The use of EP2C8Q208 FPGA chip, using the Verilog hardware descr iption language, the realization the AT24C02 of the EEPROM read and write operations.