资源列表
counter_vhd
- An asynchronous (ripple) counter is a single d-type flip-flop, with its J (data) input fed its own inverted output. This circuit can store one bit, and hence can count zero to one before it overflows (starts over 0). This counter will increment once
counter_vhd
- Counter is used to count the value of the memory register in the digital circuits-Counter is used to count the value of the memory register in the digital circuits....
counter_14uou
- Counter wikipediya information will help you to understand about this program-Counter wikipediya information will help you to understand about this program
sw_xiaodou
- 基于verilog的按键消抖控制led程序-Based verilog button debounce control led program
RAM
- Nios ii双口ram,用于MCU通过nios ii进行双口ram通信,verilog格式.-Nios II dual port RAM, for MCU dual port RAM communication, through the Nios II Verilog format.
FIFO
- Nios ii fifo,用于MCU通过nios ii进行fifo通信,verilog格式.-Nios ii fifo, for MCU FIFO communication, through the Nios II Verilog format.
trafficlights
- Verilog实现的交通灯功能工程 在Quartus环境-traffic lights of Verilog
code
- this code for assessment
the-basic-presentation-of-VerilogHDL
- VerilogHDL扫盲文介绍Verilog的基础知识-the basic presentation of VerilogHDL
AXI_VIP
- axi vip code used in almost all the interface projects in the soc and verification environments in arm processors
AHB_UVC_and_AHB_IC_Verificat
- ahb uvc is an on chip communication protocol for high speed integration and low power utilities performance protocols widely used in all vip applications
DeMUX_1X8
- Verilog code for 1X8 multiplexer