- descode_C++ DES算法源代码使用c++编程 DES算法源代码使用c++编程
- 3389copy 该软件非常好用
- HibernatePInPAction hibernate persistence practise
- JAEA-Executable for AG so you can try and see the performance analysis of this method that has gaussian mutations
- JetSegGraph Draws the event graph and progress bar.
- calculator 该计算器不仅实现了标准的运算还是实现了科学运算和复数的运算
资源列表
fasongjieshou
- fpga上发送模块和接收模块的设计与实现。不同的波特率-Design and implementation of the sending module and receiving module on fpga. Different baud rate
am-wave
- AM波的vhdl方法实现，quartusii上亲测。图形法-AM wave VHDL method to achieve, QuartusII on the pro test. Graphic method
saopin
- 扫频输出信号源，扫频范围可修改，verilog语言。-Sweep frequency output signal source, sweep frequency range can be modified, Verilog language.
LCD1602_V0.2
- fpga的一个lcd程序,程序很好，希望各位给个赞-A LCD procedures of fpga
DigitalCompinacijaSimulacija
- It is a bridge between CPU and sensors where user can not connect sensors directly on CPU. It consumes very small number od LUTs and it is suitable for CPLD design. it works on following way, when logic detects falling edge of RX, then this action tr
Mux
- Multiplexer on verilog
exp11
- 在掌握可控脉冲发生器的基础上了解正负脉宽数控调制信号发生的原理。熟练的运用示波器观察实验箱上的探测点波形。掌握时序电路设计的基本思想。-On the basis of mastering the controllable pulse generator, the principle of the digital modulation signal of the positive and negative pulse width is understood. Skilled use of osci
RESULT-adder
- adder unit which contains basic PPT and the coding
digital--clock
- 在Quartus II 平台下用verilog语言写的多功能数字钟-In the Quartus II platform with verilog language written multifunction digital clock
min-sel
- 用来找到输入数据中的最小值和第二小值得verilog源码，可仿真-Used to find the minimum value of the input data and the second small worth verilog source code, can be emulated
LCD12864
- LCD12864，包含Verilog和VHDL源码-LCD12864 control
verilog_led7
- Verilog HDL 数码管控制程序,保护整个工程文件-Verilog HDL control