资源列表
divider
- 分频器。可实现任意整数分频。占空比为50％，带复位端。-Frequency divider Arbitrary integer frequency can be achieved. Duty cycle is 50 , with reset terminal.
Cymometer
- 用FPGA设计的等精度测量频率。频率的测量范围为1Hz-100MHz。可以测占空比，测时间间隔等。可测正弦波和方波。精度大于10e（-4）-Using FPGA to design the equal precision frequency measurement.Frequency of the measuring range is 1 hz- 100 MHZ.Can examine duty ratio, time interval measurement, etc.Sine wave an
pingpong
- 用Verilog代码实现的乒乓操作，用Verilog代码实现的乒乓操作-Verilog pingpong
huxideng
- 用Verilog实现的呼吸灯，用Verilog实现的呼吸灯-Verilog huxideng
debounce
- 用Verilog实现的消抖程序的例子，用Verilog实现的消抖程序的例子-Verilog debounce
loveyou
- Verilog实现love you 状态机的小例子-a small example of the realization of the love you state machine with Verilog
vga_test
- 基于nios的vga控制器,分辨率及显示区域,显示位数,显存深度可调整,已经在altera cyclone ii条件下测试通过 quartus13.0开发环境 主机端符合avalon标准-VGA controller based on NIOS, resolution and display area show the median, the memory depth can be adjusted, has been in Altera cyclone II under the conditi
FT245
- FT245rl的驱动程序，在max1008FPGA上验证通过-the driver of ft245rl
PWM-IS
- control Pulse width modulation (PWM) using VHDL code and Block schematic.the selection switch at the FPGA board is important to control the duty cycle of PWM.For example application that can be used is to control speed dc motor.-control Pulse width m
15_pwm
- pwm 运行与 altera sopc
4_uart
- uart 代码 运行与altera sopc -uart 代码
12_sdram
- 编写的sdram 应用 altera sopc