资源列表
Xilinx_example
- xilinx 多核嵌入式系统设计的配套光盘源代码-Xilinx multi-core embedded system design form a complete set of CD source code
VGA_Qin
- VGA实验中，根据要求，动态显示图片，图片的动态效果是触及屏幕反弹 -VGA experiment, according to the requirements, dynamic display picture, dynamic picture of the effect of the screen is touched rebound
verilog
- 数字信号处理的FPGA实现(第3版) verilog源码-FPGA digital signal processing (3rd Edition) verilog source
vhd2vl-2.4.tar
- convert VHDL files to Verilog files
statled_latest.tar
- a simple module to get the most of your on board heartbeat LED change or add more sequences easily in parameters file
scalable_arbiter_latest.tar
- a scalable synchronous round-robin arbiter. The arbiter is designed to run at reasonable clock speed with up to hundreds of request lines, and it grants in just a few clock cycles.
pwm_latest.tar
- pulse width modulator, work as one PWM or one timer. 16 bit main counter
descore_latest.tar
- VHDL implementation of the classic DES block cipher (interactive architecture)
DTSM
- 在开发板上可以实现从00到59的计数，相当于一个60进制的计数器，里面包括了将脉冲分频的代码编写-In the development board can be achieved 00 to 59 counts, the equivalent of a 60 hexadecimal counter, which includes the pulse frequency of the code
alt_xaui
- altera ip a ltera ip-altera ip altera ip altera ip
altdq_dqs2
- altera ip a ltera ip-altera ip altera ip altera ip
master_bla
- master bla altera quartus II version 15