资源列表
RSFQ_Adder
- fpga implementation of rsfq adder using verilog code
fast_radix10
- fpga implementation of fast radix 10 multiplier using verilog code
Binary_search_algorithm
- fpga implementation of binary search algorithm using verilog code
eeprom
- eeprom的verilog程序,经测试程序可用-the program of eeprom in verilog.it is tested that can be used.
DDS
- 直接数字频率合成器DDS，电类综合实验课程设计-Direct digital frequency synthesizer
mod15adder_LIUZHIWEI-
- 模15加法器，能够完成7段译码以及设计了控制器来控制LED的输出-Module 15 adder, to complete the 7 segment decoding and the design of the controller to control the output of LED
Counter_LIUZHIWEI
- 同步计数器，利用有限状态机完成,能够完成000-999的加计数以及减计数功能-Synchronous counter which using finite state machine and able to complete the 000-999 plus count as well as the count function.
alu
- 四级流水ALU，能够完成加减乘除开方以及逻辑运算-4 pipeline ALU，which can add,minus,multiply,divide and rooting operation.What s more,it can do logic operation.
crc
- 基于FPGA VerilogHDL 的crc的算法。-Crc algorithm based on FPGA VerilogHDL.
CPU
- a very useful vhdl source code for simulation and test the parwan cpu navabi vhdl book-a very very useful vhdl source code for simulation and test the parwan cpu navabi vhdl book
Temperature
- FPGA 用Verilog语言时序实现与DS18B20温度传感器读写，并把温度通过LCD来显示-FPGA with Verilog language implementation and timing DS18B20 temperature sensors to read and write, and the temperature displayed by LCD
digital-frequency-meter
- 1.用VHDL完成12位十进制数字频率计的设计及仿真。 2.频率测量范围：1Hz∼ 10KHz，分成两个频段，即1∼ 999Hz，1KHz∼ 10KHz，用三位数码管显示测量频率，用LED显示表示单位，如亮绿灯表示Hz，亮红灯表示KHz。 3.具有自动校验和测量两种功能，即能用标准时钟校验、测量精度。 4.具有超量程报警功能，在超出目前量程档的测量范围时，发出灯光和音响信号。 -1. VHDL design and simulation comple