资源列表
ram
- 简单的ram程序，实现提取数据，希望对大家有所帮助，提升FPGA编程能力(Simple ram program, the realization of data extraction, hope to help you, improve the ability of FPGA programming)
VHDL verilog教程
- 多种教程包含VHDL以及verilog 收集好久(A variety of tutorials include VHDL and Verilog)
UAET_323_to_flow_led
- VHDL 实现串口收发并点亮流水灯，仿真成功(VHDL realizes serial port transceiver and lighting water lamp)
fir
- fir滤波器源代码及测试程序,有限脉冲滤波器的源程序及测试程序 ,已经通过仿真了(Filter source code and test procedures,Finite pulse filter source and test procedures, has been through the simulation)
FIR_filter_stereotype
- 第二类有限冲击响应滤波器60阶常系数verilog(The second type of finite impulse response filter, 60 order,coefficient verilog)
ijaerv12n19_122
- This work presents the principle of the command MPPT. The most used control techniques in the MPPT control are reviewed and studied, such as: observation and disturbance (O & P) and incrementation of conductance (IC). The objective of this st
SNAKE
- 基本的verilog贪吃蛇项目（微机原理课程设计）(The basic Verilog snake program (Microcomputer Principle Course Design))
cy7c443
- 存储器仿真模型，建立testBench，可对cyc443存储器进行功能仿真。(TestBench memory, can establish simulation model, function simulation of cyc443 memory.)
pid_controler
- 在FPGA内部利用VHDL硬件描述语言实现经典的PID控制算法(PID algorithm in PFGA)
serial
- FPGA实现232通讯，用verilog语言(RS232 communication design in FPGA with verilog)
运动员反应时间测量
- 测量运动员反应时间，时间不能小于200ms，否则会发出警报(Measurement of athletes' reaction time)
CSA.tar
- A Carry Select Adder.