资源列表
clk_div
- Clock divider in VHDL.
buffer_tri_state
- Buffer tristate in vhdl
BCD_to_7_seg_decoder
- BCD to 7 segments display decoder
Verilog
- FPGA开发板资料Verilog，53个例程-fpga Development board materia
FFT_n4
- FFT n point 4096 1024 -FFT n point 4096 1024 ...
uart_server
- 24路串口转1路串口服务程序, 包括FIFO模块，串口接收，发送模块，定时器模块，检测控制模块等。采用Verilog编写-24 way serial ports to 1 serial port, including FIFO module,RX module,TX module, timer module, detection and control module, etc.. Verilog preparation
m6502
- m6502 6 bit microprocessor
fistnoc
- VHDL CODE, WILL GIVE DESIGN ABOUT NETWORK ON CHIP
Nixietube_count
- 数字电路基础课程设计,在数码管上计数，在quantusII下用vdhl与verilog编写。-count number in nixie tube
Caculator
- 基于Verilog语言编写的简易计算器，实现了加减法的运算，有模块和约束文件。-Verilog language based on simple calculator, to achieve the operation of addition and subtraction, there are modules and constraint files.
verilog_code_for_double_fpu
- 64位FPU，内含testbench，已经通过验证仿真。-64-bit FPU, embedded testbench, simulation has been validated.
iic
- i2c接口的功能实现代码，用VERILOG编写，并附有testbench.-i2c interface function implementation code, written in VERILOG, along with testbench