资源列表
Broadcast_filter
- mac_rx code which is used sgmii mac recived .
CRC_chk
- mac_rx code which is used sgmii mac recived .
MAC_rx_add_chk
- mac_rx code which is used sgmii mac recived .
MAC_rx_ctrl
- mac_rx code which is used sgmii mac recived .
MAC_rx_FF
- mac_rx code which is used sgmii mac recived .
ofdm_latest.tar
- ofdm for mobile system in 3G system Orthogonal Frequency division multiplexing
Learning-Verilog
- 学习verilog，从入门到精通，全系列书籍资料，包括华为等公司内部培训资料-Learning Verilog, from entry to master the full range of books information, including Huawei and other internal training materials
FPGA-Develop
- 张国斌老师力作，指导初学者迅速入行，工程师可以获益匪浅，避免低级错误。-The Guobin teacher masterpiece, to guide beginners quickly into line, and engineers can benefit from, to avoid low-level error.
mipsoc
- 这是一个使用veriylog语言编写的微型CPU程序，使我在组成原理课程设计中所开发的程序。-This is a miniature CPU to use veriylog language program, so that the program I developed in the composition of the principles of curriculum design.
CPU-with-VHDL-16-32
- 在quartus中运行的32位指令集的16位CPU程序，模块化设计，包括MBR, BR, MR, ACC, MAR, PC, IR, CU, ROM, RAM, ALU等模块-In the the quartus run 32 16-bit CPU instruction set procedures, modular design, including the MBR, BR, MR, the ACC, the MAR, the PC, the IR CU, the ROM, RAM, ALU
Four-layer--double-Lift
- 四层双电梯智能系统，模块化设计，包括电梯选择，电梯外部控制，电梯内部控制，楼层显示等模块-Four-story elevator intelligent system, modular design, including the elevator choices, external elevator control, elevator internal control, floor display module
cyclecoder_decoder
- (7,4)循环码的verilog编码程序，（7，4）循环码的verilog译码程序-(7,4) cyclic code Verilog coding procedures, (7,4) cyclic code the verilog decoding procedure