资源列表
dog_cat_mouse_river
- 用VHDL写的程序，模拟狗，猫，老鼠过河。规则是：狗不能跟猫单独呆在一起，老鼠跟猫不能单独在一起。-Program written in VHDL, simulated dog, cat, mouse to cross the river. The rule is: the dog can not be with the cat alone with rats and cats can not be alone together.
lcd1602
- 用VHDL写的液晶显示程序，液晶模块为LCD1602，有注释-LCD program, written in VHDL LCD module LCD1602, annotated
traffic-light-CPLD
- 利用cpld实现交通灯的控制时序，实现软件microwin使用梯形图编译成功，并在西门子S7-200PLD成功运行。 -Cpld control the timing of traffic lights, the software microwin compiler, and run successfully in Siemens mc200PLD,
lcd1602
- 这个能在LCD1602上能显示时间和日期，并且能够准确的调节时间。-This can be in the LCD1602 can show the time and date, and can be accurate to adjust the time.
VHDL
- 初学者最好的学习文档之一，讲的非常详细，很清晰。-One of the beginners best learning documents is very detailed, very clear.
DS1302-driver--verilog
- 用 verilog语言 实现 DS1302 写时、分、秒 和 读 秒 并显示数码管上- driver program implementation of DS1302 chip by verilog
8051_Verilog_code
- 8051的verilog源代码,8051单片机的verilog源程序，完整验证-Verilog source code in 8051, 8051, Verilog source code, complete verification
Verilog-examples
- verilog 例程，白金手册，很多实用例程，加法器，循环编码器-verilog routines, platinum manual, many utility routines, adder, cycle coding and more
SpW_codec_perfect
- SpaceWire 编解码器完整验证，vhdl源程序，-SpaceWire compile a complete verification of decoder, VHDL source code,
spacewire_latest.tar
- SpaceWire接口，vhdl源程序，完整验证-SpaceWire interface, VHDL source code, the complete validation
01-NEC_1997_B
- 简易数字频率计（1997年B题）,本例程的rst(复位)键位于拨码开关的第1位(最右边),高电平有效。-Simple digital frequency meter Problem B (1997), the routine rst (reset) button is located in one of the DIP switch (far right), high effective.
02-NEC_1999_B
- 数字有效值电压表（1999年B题）,本例程的rst(复位)键位于拨码开关的第1位(最右边),高电平有效。-Digital rms voltmeter Problem B (1999), the routine rst (reset) button is located in one of the DIP switch (far right), active high.