资源列表
74HC595-lattice-clock
- 74HC595点阵时钟：使用74HC595芯片控制的16*16点阵时钟，流动显示时分秒，单片机：STC12C5A60S2-74HC595 lattice clock: using 74HC595 chip control 16* 16 dot matrix clock, mobile display minutes and seconds, the microcontroller: STC12C5A60S2
The-traffic-lights--design
- 基于VHDL语言实现的交通灯控制电路的设计及其仿真-Based on VHDL language implementation of traffic light control circuit design and its simulation
4-5
- 四舍五入判别电路，其输入为8421BCD码，要求当输大于或等于5时，判别电路输出为1，反之为0。-Four to five homes in judging circuit, the input to the 8421BCD code, when the distance is greater than or equal to 5, judging circuit outputs of 1, instead of 0.
CPLD--VHDL
- VHDL的基础知识,一切从基础开始!希望这个对大家有所帮助!-VHDL basic knowledge, everything from the foundation started! We hope that the right help!
hanzi
- 使用VHDL书写的汉字滚动显示源程序，可以作为初学者参考-Using VHDL source code written in Chinese characters scrolling display can be used as reference for beginners
3-8xianyimaqi
- VHDL语言实现3-8线译码器，带仿真波形图，和管脚分布图-VHDLLanguage 3-8 line decoder
nandH_10
- 该设计实现十路而输入与非门产生环路自激振荡-Here is a disign which can make ten nand2 standand logic gate shock by itself
15883852DJDPLV_LWB
- 数字频率计毕业论文 不是自己做的-Digital Cymometer thesis do not own. . Ha ha
shuzishizhong
- 多功能数字钟具有如下功能 1．秒／分／时的依次显示并正确计数； 2．定时闹钟：实现整点报时，扬声器发出报时声音； 3．时间设置，即手动调时功能：当认为时钟不准确时，可以分别对分／时进行调整；-The multi-function digital clock has the following features 1. Sec/min/turn and correct count 2. Regular alarm clock: the whole point of time,
micro
- 16 cpu design VHDL source code, including alu, clock, memory and other parts of the design
fft
- 1024点，8位定点数的FFT计算，代码精炼，注释全面值得下载-1024 points, FFT calculation eight fixed-point code refining, comprehensive notes worth downloading
CPLD_frequency_divider.rar
- 这是CPLD原始代码程序，是天祥电子所写，希望大家会喜欢！,This is the original code CPLD program is written by Tienhsiang e hope you will like it!