资源列表
pwm
- 乒乓球实验的VERILOG源代码。XILINX spartan6.-Table Tennis experiment VERILOG source code. XILINX spartan6.
pingpang
- 500分频的verilog源代码。XILINX SPARTAN6.-500 divided by the verilog source code. XILINX SPARTAN6.
vga
- VGA显示的verilog整个代码。在xilinx spartan6板子上测试。-VGA display the verilog source code. Test in on xilinx spartan6 board.
10beipin
- cpld的10倍频程序，并进行功能仿真。-the cpld decade program, and functional simulation.
7_seg
- 七段显示译码器完整程序，适用芯片Cyclone 2系列-Segment display decoder complete the program, applicable to chip the Cyclone series
verilog_dds
- verilog实现dds，用于FPGA产生正弦波，适用于Cyclone 2系列-verilog achieve dds, FPGA is used to generate the sine wave, in the Cyclone Series
verilog--uart
- verilog实现uart功能的FPGA应用，适用于Cyclone 2系列-verilog uart function of FPGA applications in the Cyclone Series
verilog--sram
- ram的fpga应用，用verilog语言实现，适用于cyclone 2系列-ram the fpga application verilog language applicable to cyclone 2
10_100m_ethernet-fifo
- 本源码源自于网络，采用verilog编写完成10M以太网到100M以太网的FIFO转化。-The source from the network, using verilog written 10M Ethernet 100M Ethernet FIFO conversion.
vhdl_can_IP.tar
- 运用VHDL语言实现的一个CAN通信控制器IP核-Communication of a CAN controller IP core using VHDL language
can_verilog_IP.tar
- 运用Verilog语言编写的CAN控制IP核，符合CAN2.0B协议，仅作为参考！-CAN controller IP core using Verilog language, in line with CAN2.0B agreement, only as a reference!
i2c_latest.tar
- IIC通信机制的Verilog HDL实现，IIC是一种串行通信总线，它可以提供为设备间的通信提供一种简单有效的方式-IIC communication mechanism of Verilog HDL implementation, I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices。