资源列表
DE2_TV
- 这样的设计将DVD视频转换成合适的格式显示在CRT/ LCD显示器。应连接一个DVD视频源，如DVD播放器，在DE2开发板上的VIDEO IN端口。应连接一个CRT/ LCD显示器的VGA端口。应在DVD视频显示在监视器上。-This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should
ram_control_17_xian
- 基于VHDL的ram控制器，8根输入，8根输出，1根读写控制线。实现ram的读写控制-The ram controller based on VHDL, 8 input and 8 output, a read-write control lines. Ram read and write control
verilog串口收发模块程序
- 基于verilogHDL语言的RS232串口收发模块程序
DE2_SD_Card_Audio
- 该设计使用了Nios II系统来演示如何从SD卡读取。该软件从SD卡读取WAV文件并播放它通过LINE OUT线。简单地把SD卡插入插槽，在板子上，并连接音箱的LINE OUT端口。-This designs uses a Nios II system to demonstrate how to read from the SD card. The software reads WAV files from the SD card and plays it through the LINE OU
clock_dis
- 电子时钟 电子时钟 数码管显示 电子时钟 -clock display zhen ni ma ma fan，zi jie ni mei
fpga-waveformer
- 文章介绍了如何在FPGA中实现任意波形发生器-this paper helps us to know how to build a some waveform in fpga
nios_led
- 一个基础的FPGA的实验，包括sopc搭建硬件平台到用NIOS II软件编写控制程序。本实验是基于DE2开发板做的，可直接下载入片内观察到流水灯的现象。-A FPGA-based experiments, including sopc build the hardware platform to write NIOS II software control program. The experiment is based DE2 development board, observed the p
Verilog-HDL
- 设计与验证：Verilog HDL(清晰带书签)---学习Verilog HDL的很好的资料，这个PDF清晰还带书签，愿能够帮助你。-this material about Learning Verilog HDL is very good
clock
- fpga实现电子时钟在数码管上显示，有设置时间功能。显示时分秒。-fpga electronic clock on the digital display, set the time function. Displayed every second.
library-ieee
- 用VHDL语言编写的锯齿波，并且包括锁存器的生成代码-With the VHDL language sawtooth, and latch generate code
xapp443
- XILINX的一个以太网例程，包含以太网内核的建立以及仿真过程，是XAPP443的例子-Routines of the XILINX a Ethernet, including Ethernet kernel establish and simulation process XAPP443 example
From-Arithmetic-to-Hardware-Logic
- 夏宇闻著作：从算法设计到硬线逻辑的实现.DOC Verilog HDL的基本算法及实现-From Arithmetic to Hardware Logic. Verilog HDL