资源列表
primerprograma_2.tar
- First Program on verilog
punto4.3.tar
- Testing Multiplexer on verilog
punto4.4.tar
- Testing Multiplexer on verilog another way
trabajoprevio.tar
- Testing Multiplexer on verilog pre-lab
inout-vhdl
- c p u 读inout 端口的vhdl 程序-Read inout port vhdl program
period_cntr_avl
- Frequency measurement IP Core for ALTERA NIOS2
ads8361_avl
- Interface for ADS8361 TI ADC IP Core for ALTERA NIOS2
ISE
- ISE的使用说明,一步一步教你如何建立工程，如何使用ISE的功能-teach you how to use ISE
Source codes
- Involves source codes of vlsi projects
abc
- 用VERILOG编写的FPGA控制vga显示的源码-FPGA control the vga display the source code written in VERILOG
key
- 2*8 点阵键盘扫描 verilog FPGA实验 实现数字显示 移位等功能-2* 8 dot matrix keyboard scan for digital display shift function
SAR-ADC
- 这是一个用于实现逐次逼近型ADC的控制程序，用状态机实现的，用的VHDL语言。在实际项目中测试过-This is a successive approximation type ADC control program, written using the state machine tested in the actual project