资源列表
cadideng2.v
- 循环左右移动，可控8位彩灯控制器，可根据时钟信号进行自动响应-Circulation and move around, controllable 8 lantern controller, according to the clock signal automatic response
TFT_LCD
- TFTLCD ILI9325的nios程序 verilog编写可以在板子上运行-TFTLCD ILI9325 the nios verilog program can run on the board to write
miaobiao
- 由verilog编写的秒表程序，按键控制 按下一键秒表停止 按下另外一键 秒表又运行-Verilog prepared by a stopwatch program, press a button control key pressed another button to stop the stopwatch stopwatch and run
F161xb8
- 模块名称：4位同步计数器模块 功能描述：完成4位同步计数器的功能-Module Name: 4 Synchronous Counter Module Descr iption: Complete four synchronous counter function
risc8
- 一个功能简单的八位cpu，适合刚入门的FPGA Verilog 编程，试过能用！-A simple function of the eight cpu, just portal for FPGA Verilog programming, tried to use!
I121-v1.10
- Implementation of Serial Infrared decoder for low-speed IrDA communications.
12-Flashing_LED
- 采用低级建模方式编写的任意可控流水灯程序，程序本身不难，主要是描述建模思想供大家学习-Using low-level modeling approach to the preparation of any controllable light water program, the program itself is not difficult, mainly descr iptive modeling idea for everyone to learn
u-c
- 通过控制机控制CH376 USB芯片达到从机模式通信的目的，采用了低级建模的思想-By controlling the motor control chip CH376 USB slave mode to achieve the purpose of communication, the idea of using a low-level modeling
USB-COM-routines
- 使用CPLD实现的USB通讯与UART通讯相互转换，USB通讯速率可以达到20M 使用专用USB接口芯片cy7c68013芯片-Using CPLD implementation of USB communication and conversion between UART communication, USB communication speed can reach 20M using the dedicated USB interface chip chip cy7c68013
STFT
- 短时傅里叶变换的FPGA实现零重复度使用了fft的IP核设计-When the Fourier transform of the FPGA to achieve zero repeatability using fft IP core design
VHDL
- It is a VHDL program
DIVIDE_1_2_5_8_HZ
- pulse from 100MHz divided into several categories such as 1,2,5,8 Hz pulse