资源列表
prbs_suite_latest.tar
- is the implementation of PRBS
HDL
- 这是vhdl语言的一些基本知识，希望对初学者有所帮助-This is some basic knowledge of vhdl language, hoping to help beginners
two-of-the-state-machine-written
- 文档中主要介绍状态机的两种写法--竖着写(在状态中判断事件)和横着写(在事件中判断状态)。-The document introduces two of the state machine written- bristling write (write (in the incident to determine the state judge in the state in the event) and sideways).
7
- VHDL实验程序，关于数码管的动态显示，非常有用-VHDL experimental procedures on digital tube dynamic display, very useful
MP3
- MP3 decoder. dkfjgldfmgmxc,.vx fhf hbfgbmlvmcb fghl;fb;c hgfgnlg
phase_shift
- cpld/fpga实现移相功能 d触发器 数据选择器 单片机接口-phase_shift using cpld/fpga
lowfrequencyphasemeasurement
- 原创代码--绝对值得下载 低频相位测量原代码， 测量精度可到10^-6次方，测量范围1hZ-30M -Original code- definitely worth downloading the original source of low-frequency phase measurement, the measurement accuracy can be 10 ^-6 power, range 1hZ-30M
omu_b
- CPLD的功能实现,主要有FPGA配置、寄存器定义、两种分频等内容-The realization of the function of the Slave SerialCPLD, basically have FPGA configuration, register definition, two kind of frequency division, etc
vhdl驱动液晶显示
- 是关于用vhdl驱动12864液晶显示的程序，适合初学者参考学习
fpga-pulse_sequence
- pulse_sequence.vhd 并行脉冲控制器 light.vhd.vhd 交通脉冲控制器 division1.vhd 电压脉冲控制器中的分频 ad.vhd 电压脉冲控制器中的A/D控制 code.vhd 电压脉冲控制器中的脉冲运算模块 voltage2.bdf 电压脉冲控制系统-pulse_sequence.vhd pulse controller parallel light.vhd.vhd traffic controller division1.vhd puls
uart_vhdl
- The UART design was designed from a standard uart function with a read/write microprocessor interface. It includes standard framing error, parity control and overrun detection. This design is targeted to the XCR3128XL-7VQ100C CoolRunner CPLD. This
Verilog-Mxulie
- 用Verilog编的M序列代码，用的是移位发生器的思想，即循环移动并用后来的数值取代-M-sequence code in Verilog code, using the shift generator the idea that the circulation moving and replaced with the later values