资源列表
DE2_115_Audio
- DE2-115开发板音频录放verilog HDL代码-DE2-115 development board audio recorders verilog HDL code
DE2_115_NIOS_DEVICE_LED
- DE2-115开发板的LED灯设计 Verilog HDL语言编写-DE2-115 development board LED lamp design Verilog HDL language
DE2_115_NIOS_HOST_MOUSE_VGA
- DE2-115开发板的verilog HDL的VGA设计-DE2-115 development board VGA verilog HDL design
DE2_115_PS2_DEMO
- DE2-115开发板的PS2的Verilog HDL语言设计-The DE2-115 development board of the PS2 Verilog HDL language design
pailiezuhe
- 基于fpga的多功能数字钟，并且用1602显示，24小时，可调时，分，秒-Fpga-based multi-function digital clock, and with the 1602 show, 24 hours, adjustable hours, minutes, seconds
ddr2
- 基于xilinx spartan -3A DSP的ddr2控制器-Based on the Xilinx Spartan-3A DSP DDR2 controller
FIFO
- 很好的FIFO学习资料，由最简单的结构开始，教你如何设计FIFO。-Good FIFO learning materials, starting from the most simple structure, teach you how to design a FIFO.
1602
- 基于Verilog的液晶初始化程序。本程序可初始化基于ＦＰＧＡ的１６０２模块。-Verilog-based LCD initialization procedure. This procedure can initialize the based FPGA module 1602.
FPGA
- FPGA初学者的宝典，内有27个有价值的实例，让你轻轻松松学会FPGA。-The complete collection of questions and of the FPGA beginners, within the there are 27 valuable an instance of, let you relax lightly learn to the FPGA.
GPSDECODE
- 完成GPS的IRIG_B码解码，已经模块化，并且有详细的中文注释-Completed the GPS IRIG_B of decoding modular, and there are detailed notes in Chinese
multiplication
- 1.sign_multi文件夹中是有符号数的乘法运算，实现了4bit*4bit的数据运算。 2.unsign_multi文件夹中是无符号的4bit*4bit运算。 以上两个文件均通过Quartusii综合 另外每个文件夹中又包括sign_multi_modelsim和unsign_multi_modelsim文件夹，其中包含了用modelsim仿真的所有文件，已调试通过仿真。-1.sign_multi folder is the multiplication of the
ethernet-verilog
- 非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考-Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference